Switching-type regulators typically include a high current switch (e.g., a MOSFET) along with an oscillator and pulse width modulator (PWM) that can operate the switch and vary its duty cycle as a function of a feedback or control voltage input. When combined with appropriate external components, such regulators can provide a regulated direct current (DC) voltage output signal. Buck converters are switching-type voltage regulators in which the output voltage is substantially lower (“stepped down”) than an applied input voltage. In contrast, up-converters are switching-type voltage regulators in which the regulated output exceeds the input supply voltage, and positive-to-negative or negative-to-positive polarity converters are switching-type voltage regulators in which the regulated output is inverted. In terms of power supply efficiency switching-type regulators can operate at about 90% or better.
FIG. 3 is a diagram showing a simplified circuit including a conventional buck converter 10. Buck converter 10 includes an error amplifier 50 that receives a reference voltage VREF on its non-inverting input and a feedback signal VFB on its inverting signal. The output signal VEA-OUT from error amplifier 50 is applied to one input terminal of a pulse width modulator (PWM) circuit 70, and a second input terminal of PWM circuit 70 is connected to receive an oscillating ramp signal VOSC-RAMP from an oscillator 80. The PWM circuit 70 compares error amplifier output signal VEA-OUT with oscillating ramp signal VOSC-RAMP to produce a square wave signal VPULSE having a duty cycle whose instantaneous value is related to the voltage level of error amplifier output signal VEA-OUT. Square wave signal VPULSE is applied to the gate of a power transistor 75, which generates a regulated output voltage VOUT that is applied to a load represented by inductor LL, a capacitor CL, and a resistor RL. By feeding back a portion of regulated output voltage VOUT via a suitable feedback circuit (e.g., the divider formed by resistors R1 and R2), the duty cycle of PWM circuit 70 can be maintained at a level that generates the duty cycle needed to produce the desired regulated voltage VOUT.
A problem associated with conventional buck converters is voltage overshoot at start up. Before start up, load capacitance CL is fully discharged, and output voltage VOUT is zero. At start up (e.g., when power VDD is applied), feedback voltage VFB is initially zero, so reference voltage VREF will dominate the operation of error amplifier 50, thus causing it to generate output signal VEA-OUT that maximizes the duty cycle of PWM circuit 70 in an effort to charge load capacitor CL as rapidly as possible. The resulting surge can damage output transistor 75 and typically overshoots the desired output voltage, possibly overloading the input supply and/or damaging the load circuit. The surge would also generate a huge input current, touching the alarm limit on the input supply. Accordingly, some form of “soft-start” is desirable where the starting surge is avoided.
One prior art solution to the start up overshoot problem is to employ some form of “soft-start”, where the starting surge is avoided by causing output voltage VOUT to gradually rise from zero to the desired nominal level at start up. A common method for achieving this soft-start function is to employ an external capacitor to control the error amplifier output signal VEA-OUT such that it increases gradually at start up, thereby causing the duty cycle of PWM 70 to gradually increase, thus preventing significant overshoot when the desired output voltage is VOUT achieved. External capacitors are used to produce the soft-start function because operational amplifier currents are typically too large to support the use of practical semiconductor (i.e., integrated) capacitors. The size (capacitance) of the external capacitor is selected to achieve desired output characteristics (i.e., based on the load circuit impedance and desired overshoot characteristics), and the external capacitor is typically connected to the operational amplifier during assembly by way of a dedicated device pin.
A problem with the practice of using external capacitors to produce desired soft-start characteristics is that the use of external capacitors is relatively expensive due to both the component cost and the assembly costs associated with mounting the external capacitor. Further, the external capacitor takes up a valuable device pin, which prevents the use of that pin for other input/output signals.
One prior art solution to the start up overshoot problem is to employ a digital soft-start circuit, which digitally controls the duty cycle of the regulator during start up, thereby providing the soft-start function without the need for a large external capacitor. A problem with digital soft-start circuits is that they require a significantly larger amount of chip area than analog solutions, so by comparison analog soft-start solutions present a strong price and simplicity advantage.
What is needed is an analog soft-start circuit for switching regulator that generates a ramp voltage without using an external capacitor and dedicated device pin. What is also needed is an analog soft-start circuit for switching regulator that uses an analog voltage clamp circuit to ramp the regulated output voltage to the desired voltage level without significant overshoot.